company blog about Supply TI Interface Deserializers TSER4905RTDR Bridge Serializer

Supply TI Interface Deserializers TSER4905RTDR Bridge Serializer

Description
TSER4905RTDR is a MIPI DSI to V3Link bridge device. In conjunction with an V3Link deserializer, the chipset provides a high-speed serialized interface over low cost 50Ω coax or STP cables.

Feature
Single or dual port MIPI DSI receiver
Compliant to D-PHY v1.2 and DSI v1.3.1
1 clock lane and 1-4 configurable data lanesper D-PHY Port
Up to 2.5 Gbps/lane with skew calibration
Supports data lane swap and polarity inversion
Supports both burst and non-burst mode
SuperFrame Unpacking Capability
Suitable for 4K @ 60 Hz video resolution
Supports 10.8/6.75/3.375 Gbps per channel;Up to 21.6 Gbps over dual channels
Coax/STP interconnect support
Port Splitting to enable Y-cable interfaces
Ultra-low latency control channel
Two I2C up to 1MHz (up to 3.4 MHz for localbus access)
High speed GPIOs
Security and diagnostics
Voltage and temperature monitoring
Line Fault Detection
BIST and pattern generation
CRC and error diagnostics
Unique ID for counterfeit protection
ECC on control bits
Advanced link robustness and EMC control
Data scrambling
Spread spectrum clocking generation (SSCG)
Low power operation
1.8-V and 1.1-V dual power supply

Applications
High Resolution Display
Operating room displays
Seatback entertainment displays
High resolution HMI